Z/Architecture in the context of Status register


Z/Architecture in the context of Status register

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πŸ‘‰ Z/Architecture in the context of Status register

A status register, flag register, or condition code register (CCR) is a collection of status flag bits for a processor. Examples of such registers include FLAGS register in the x86 architecture, flags in the program status word (PSW) register in the IBM System/360 architecture through z/Architecture, and the application program status register (APSR) in the ARM Cortex-A architecture.

The status register is a hardware register that contains information about the state of the processor. Individual bits are implicitly or explicitly read and/or written by the machine code instructions executing on the processor. The status register lets an instruction take action contingent on the outcome of a previous instruction.

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Z/Architecture in the context of IBM z Systems

IBM Z is a family name used by IBM for all of its z/Architecture mainframe computers.In July 2017, with another generation of products, the official family was changed to IBM Z from IBM z Systems; the IBM Z family includes the newest model, the IBM z17, as well as the z16, z15, z14, and z13 (released under the IBM z Systems/IBM System z names), the IBM zEnterprise models (in common use the zEC12 and z196), the IBM System z10 models (in common use the z10 EC), the IBM System z9 models (in common use the z9 EC) and IBM eServer zSeries models (in common use refers only to the z900 and z990 generations of mainframe).

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Z/Architecture in the context of Stack pointer

A stack register is a computer central processor register whose purpose is to keep track of a call stack. On an accumulator-based architecture machine, this may be a dedicated register. On a machine with multiple general-purpose registers, it may be a register that is reserved by convention, such as on the IBM System/360 through z/Architecture architecture and RISC architectures, or it may be a register that procedure call and return instructions are hardwired to use, such as on the PDP-11, VAX, and Intel x86 architectures. Some designs such as the Data General Eclipse had no dedicated register, but used a reserved hardware memory address for this function.

Machines before the late 1960sβ€”such as the PDP-8 and HP 2100β€”did not have compilers which supported recursion. Their subroutine instructions typically would save the current location in the jump address, and then set the program counter to the next address. While this is simpler than maintaining a stack, since there is only one return location per subroutine code section, there cannot be recursion without considerable effort on the part of the programmer.

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