Thermal oxidation in the context of MOS transistor

In electronics, the metal–oxide–semiconductor field-effect transistor (MOSFET, MOS-FET, MOS FET, or MOS transistor) is a type of field-effect transistor (FET), most commonly fabricated by the controlled oxidation of silicon. It has an insulated gate, the voltage of which determines the conductivity of the device. This ability to change conductivity with the amount of applied voltage can be used for amplifying or switching electronic signals. The term metal–insulator–semiconductor field-effect transistor (MISFET) is almost synonymous with MOSFET. Another near-synonym is insulated-gate field-effect transistor (IGFET).

The main advantage of a MOSFET is that it requires almost no input current to control the load current under steady-state or low-frequency conditions, especially compared to bipolar junction transistors (BJTs). However, at high frequencies or when switching rapidly, a MOSFET may require significant current to charge and discharge its gate capacitance. In an enhancement mode MOSFET, voltage applied to the gate terminal increases the conductivity of the device. In depletion mode transistors, voltage applied at the gate reduces the conductivity.

Semiconductor device fabrication is the process used to manufacture semiconductor devices, typically integrated circuits (ICs) such as microprocessors, microcontrollers, and memories (such as RAM and flash memory). It is a multiple-step photolithographic and physico-chemical process (with steps such as thermal oxidation, thin-film deposition, ion implantation, etching) during which electronic circuits are gradually created on a wafer, typically made of pure single-crystal semiconducting material. Silicon is almost always used, but various compound semiconductors are used for specialized applications. Steps such as etching and photolithography can be used to manufacture other devices, such as LCD and OLED displays.

The fabrication process is performed in highly specialized semiconductor fabrication plants, also called foundries or "fabs", with the central part being the "clean room". In more advanced semiconductor devices, such as modern 14/10/7 nm nodes, fabrication can take up to 15 weeks, with 11–13 weeks being the industry average. Production in advanced fabrication facilities is completely automated, with automated material handling systems taking care of the transport of wafers from machine to machine.

The Deal–Grove model mathematically describes the growth of an oxide layer on the surface of a material. In particular, it is used to predict and interpret thermal oxidation of silicon in semiconductor device fabrication. The model was first published in 1965 by Bruce Deal and Andrew Grove of Fairchild Semiconductor, building on Mohamed M. Atalla's work on silicon surface passivation by thermal oxidation at Bell Labs in the late 1950s. This served as a step in the development of CMOS devices and the fabrication of integrated circuits.

Silicon nanowires, also referred to as SiNWs, are a type of semiconductor nanowire most often formed from a silicon precursor by etching of a solid or through catalyzed growth from a vapor or liquid phase. Such nanowires have promising applications in lithium-ion batteries, thermoelectrics and sensors. Initial synthesis of SiNWs is often accompanied by thermal oxidation steps to yield structures of accurately tailored size and morphology.

SiNWs have unique properties that are not seen in bulk (three-dimensional) silicon materials. These properties arise from an unusual quasi one-dimensional electronic structure and are the subject of research across numerous disciplines and applications. The reason that SiNWs are considered one of the most important one-dimensional materials is they could have a function as building blocks for nanoscale electronics assembled without the need for complex and costly fabrication facilities. SiNWs are frequently studied towards applications including photovoltaics, nanowire batteries, thermoelectrics and non-volatile memory.